[1]王浩、陈知新、谢文明、陈天玮.基于Vaq的高能效电容拆分结构DAC开关算法[J].福建工程学院学报,2020,18(03):255-259.[doi:10.3969/j.issn.1672-4348.2020.03.010]
　WANG Hao,CHEN Zhixin,XIE Wenming,et al.Vaq-based capacitor-splitting DAC switching algorithms with high energy-efficiency for SAR ADCs[J].Journal of FuJian University of Technology,2020,18(03):255-259.[doi:10.3969/j.issn.1672-4348.2020.03.010]
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基于Vaq的高能效电容拆分结构DAC开关算法()
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《福建工程学院学报》[ISSN:2097-3853/CN:35-1351/Z]

卷:
第18卷
期数:
2020年03期
页码:
255-259
栏目:
出版日期:
2020-06-25

文章信息/Info

Title:
Vaq-based capacitor-splitting DAC switching algorithms with high energy-efficiency for SAR ADCs
作者:
王浩、陈知新、谢文明、陈天玮
福建工程学院信息科学与工程学院
Author(s):
WANG Hao;  CHEN Zhixin;  XIE Wenming;  CHEN Tianwei
School of Information Science and Engineering, Fujian University of Technology
关键词:
电容; 有效面积; 开关算法; 高精度; 基于Vaq; 拆分电容技术
Keywords:
capacifor;  area-efficient;  switching algorithm;  high accuracy;  Vaq-based;  capacitor-splitting
分类号:
TN43
DOI:
10.3969/j.issn.1672-4348.2020.03.010
文献标志码:
A
摘要:
提出了一种应用于逐次逼近型模数转换器( Successive approximation register analog-to-digitalconverters，SAR ADC)的小面积高能效电容拆分结构DAC 开关算法。 在最后两个位转换周期中引入了第三参考电压Vaq(VREF / 4)， 降低了开关能耗和电容面积。 为了进一步降低开关能耗，除了第一、第二和倒数第二个位转换周期外，整个转换过程都采用了单边双电平开关算法。 与单调结构开关算法相比，该开关算法能耗减少了98.45%，电容面积减少了75%。 同时进行线性度分析，微分非线性(Dif￣ferential Nonlinearity，DNL)和积分非线性(Integral Nonlinearity，INL) 分别为0.324LSB 和0.243LSB，验证了电容失配对ADC 的精度影响很小。 因此，文章所提出的DAC 开关算法在能耗、电容面积和ADC精度之间具有很好的折衷性。
Abstract:
An area-efficient high-efficiency capacitor-splitting switching algorithm for successive approximation register (SAR) analog-to-digital converters (ADCs) was proposed. The third voltage reference Vaq(V REF/4) was introduced during the last two bit cycles, leading to low power consumption and capacitor area. To further reduce the switching energy, the one-side double-level switching method was utilized during the entire bit cycles except the first, second and the last but one. Compared with the monotonic one, the proposed capacitor switching method achieves 98.45% energy saving and 75% capacitor area reduction, respectively. Meanwhile, the linearity analysis was performed, and DNL and INL were 0.324LSB and 0.243LSB, respectively, which verifies the minimum effect of capacitor mismatch on SAR ADC accuracy. Thus, the proposed switching scheme is a good trade-off among the energy-efficiency, capacitor area and accuracy of the ADC.

参考文献/References:

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更新日期/Last Update: 2020-06-25