[1]王浩 钟伦贵 谢文明 郑少烽.SAR ADC中高能效电荷均值开关方法[J].福建工程学院学报,2017,15(03):285-288.[doi:10.3969/j.issn.1672-4348.2017.03.017]
 Wang Hao,Zhong Lungui,Xie Wenming,et al.Energy-efficient charge-average capacitor switching scheme for SAR ADC[J].Journal of FuJian University of Technology,2017,15(03):285-288.[doi:10.3969/j.issn.1672-4348.2017.03.017]
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SAR ADC中高能效电荷均值开关方法()
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《福建工程学院学报》[ISSN:2097-3853/CN:35-1351/Z]

卷:
第15卷
期数:
2017年03期
页码:
285-288
栏目:
出版日期:
2017-06-25

文章信息/Info

Title:
Energy-efficient charge-average capacitor switching scheme for SAR ADC
作者:
王浩 钟伦贵 谢文明 郑少烽
福建工程学院信息科学与工程学院微电子技术教研室
Author(s):
Wang Hao Zhong Lungui Xie Wenming Zheng Shaofeng
College of Information Science and Engineering, Fujian University of Technology
关键词:
高能效 电荷均值 开关方法 SAR ADC
Keywords:
high energy-efficiencycharge-average switching scheme successive approximation register analog-to-digital converters(SAR ADC)
分类号:
TN43
DOI:
10.3969/j.issn.1672-4348.2017.03.017
文献标志码:
A
摘要:
提出一种逐次逼近型模数转换器(successive approximation register analog-to-digital converter,SAR ADC)高能效电荷均值开关方法。该方法能够提供恒定的共模电压VCM,大小为VREF的一半,且只需要使用两个参考电压VREF和地,避免了额外的电压基准电路。为了增加一位精度并保持恒定的共模电压,C-2C结构替代参考电容C。与单调开关方法相比,该方法能耗减少66.65%,电容面积减少49.41%。行为仿真结果证明了该方法的有效性。
Abstract:
An energy-efficient charge-average capacitor switching scheme was proposed for successive approximation register analog-to-digital converters (SAR ADCs). The charge-average technique ensures constant common-mode voltage VCM, which is VREF/2. Thus, only two reference voltages, VREF and ground, are utilized,avoiding extra circuit for generating references. Besides, to add one more bit precision and to keep common-mode voltage constant, a dummy capacitor is realized by C-2C structure instead of unit capacitor C. As a result, the proposed switching technique can save energy by 66.65% and reduce capacitor area by 49.41%, respectively, compared to the monotonic switching scheme. Behavioural simulation results indicate that the proposed switching scheme is effective.

参考文献/References:

[1] Liu C C, Chang S J, Huang G Y, et al. A 10-bit 50-MS/s SAR ADC with a monotonic capacitor switching procedure[J]. IEEE Journal of SolidState Circuits,2010,45(4):731-740.
[2] Yuan C, Lam Y. Low-energy and area-efficient tri-level switching scheme for SAR ADC[J]. Electronics Letters,2012,48(9):482-483.
[3] Liou C Y, Hsieh C C. A 2.4-to-5.2 fJ/conversionstep 10b 0.5-to-4MS/s SAR ADC with charge-average switching DAC in 90nm CMOS[C]∥IEEE International SolidState Circuits Conference(ISSCC). San Francisco, CA, USA. Feb 17-21,2013.Washington:IEEE,2013.
[4] Rahimi E, Yavari M. Energy-efficient high-accuracy switching method for SAR ADCs[J]. Electronics Letters,2014,50(7):499-501. 
[5] Kim J E, Cho S J, Kim Y S, et al. Energy-efficient charge-average switching DAC with floating capacitors for SAR ADC[J]. Electronics Letters,2014,50(16):1131-1132.

更新日期/Last Update: 2017-06-25